GOEPEL electronic demonstrates first ChipVORX Prototype Instruments for Bit Error Rate Tests
At the International Test Conference (ITC) GOEPEL electronic introduces the first ChipVORX® model prototype to execute Bit Error Rate Tests (BERT) using on-board Field Programmable Gate Arrays (FPGA).
(Media-Newswire.com) - At the International Test Conference ( ITC ) GOEPEL electronic introduces the first ChipVORX® model prototype to execute Bit Error Rate Tests ( BERT ) using on-board Field Programmable Gate Arrays ( FPGA ).
The new solution enables the utilisation of FPGA Embedded Instruments in the form of special softcores for the test and design validation of high-speed I/O. This will allow users to evaluate the quality of interconnections by way of bit error rates and also by analysing eye diagrams and is compatible with the newest FPGA families. The entire ChipVORX® workflow is highly automated and does not require any design synthesis.
“On the one hand, the increasingly powerful FPGA platforms continuously promote the utilisation and the speed of Gigabit connection links. On the other hand, the access conditions for necessary validation by means of external BERT instruments is getting more and more difficult, and the hardware becomes ever more expensive. We want to break this vicious circle with our new ChipVORX solutions”, says Thomas Wenzel, Managing Director of GOEPEL electronic’s JTAG/Boundary Scan Division. “At the same time, this strategically highly important component complements our product portfolio of synthesis-free IPs for FPGA Embedded Instruments.”
Dr. Artur Jutman, President of Testonica adds: “The development of a universal and highly automatic BERT instrumentation for a theoretical link speed of more than 40 Gbps has been the goal of the cooperation with GOEPEL electronic. We have fully met this approach. Now we need to port the IP to all leading FPGA platforms.”
About Bit Error Rate Test ( BERT ): So called Bit Error Rates ( BER ) are measured to evaluate the channel quality in digital transmission systems. BER is the relation between faulty transported bits and the total number of transported bits in a certain time interval. The equipment consists basically of the pattern generator, a transceiver with error detector and a clock generator, synchronising both. The bit patterns, created by the pattern generator, are in particular important for the quality of the Bit Error Rate Test, as they have critical influence on the fault stimulation during the transmission ( stress pattern ).
About Chip embedded Instruments: Chip embedded Instruments are permanently integrated or temporarily implemented test and measurement functions ( T&M ) in an integrated circuit. Virtually, they are the counterpart to external T&M instruments as they don’t require invasive contacting by means of probes or nails. Hence, the problem of signal distortion in high-speed designs by parasitic contacting effects is omitted. Chip embedded Instruments are part of the so called Embedded System Access ( ESA ) technologies, featuring methods such as Boundary Scan, Processor Emulation Test, in-system programming or Core assisted Programming. ESA technologies are currently the most modern strategy for validation, test and debug as well as programming of complex boards and systems. They can be utilised throughout the entire product life cycle, enabling improved test coverage at reduced costs.
About ChipVORX®: ChipVORX is an IP-based technology for implementation, access and control of Chip embedded Instruments via IEEE Std. 1149.x/JTAG. It also supports FPGA embedded instruments in the form of softcores. The ChipVORX library currently contains more than 300 different test and measurement instruments for all leading FPGA platforms. Some of these instruments are frequency meters and high-speed Flash programmer as well as IP for at-speed access test of dynamic RAM devices. The usage of ChipVORX® requires neither expert background knowledge nor specific FPGA tools or continuous IP adjustments.
About the development, funding and availability: The BERT instruments development as prototypes and their integration into respective system software is the result of a strategic cooperation between GOEPEL electronic and Testonica Lab The final version is scheduled for launch in the late first quarter of 2013.
The project upon which this publication is based was funded by the Federal Minister of Education and Research within the frame of the Eurostars funding programme ( E! 5568 COMBOARD ).
This story was released on 2012-11-12. Please make sure to visit the official company or organization web site to learn more about the original release date. See our disclaimer for additional information.